Fine/coarse-grain architectural elements connected by a network on chip
Software-like design tool flow for dynamically reconfigurable platform
Full set of industrial applications
Unique development to true silicon
Dynamic System Reconfiguration in Heterogeneous Platforms defines the MORPHEUS platform that can join the performance density advantage of reconfigurable technologies and the easy control capabilities of general purpose processors. It consists of a System-on-Chip made of a scalable system infrastructure hosting heterogeneous reconfigurable accelerators, providing dynamic reconfiguration capabilities and data-stream management capabilities.
Preface. Acknowledgments. Contributing Authors. Part I Introduction to MORPHEUS. 1. Introduction; Philippe Bonnot, Alberto Rosti, Fabio Campi, Wolfram Putzke- Röming, Nikolaos S. Voros, Michael Hübner, Hélène Gros. 2. State of the art; Alberto Rosti, Fabio Campi, Philippe Bonnot, Paul Brelet. Part II The MORPHEUS Architecture. 3. MORPHEUS architecture overview; Wolfram Putzke-Röming. 4. Flexeos Embedded FPGA Solution; Gabriele Pulini, David Hulance. 5. The Dream Digital Signal Processor; Claudio Mucci, Davide Rossi, Fabio Campi, Luca Ciccarelli, Matteo Pizzotti, Luca Perugini, Luca Vanzolini, Tommaso De Marco, Massimiliano Innocenti. 6. XPP-III; Eberhard Schüler, Markus Weinhardt. 7. The Hardware Services; Stéphane Guyetant, Stéphane Chevobbe, Sean Whitty, Henning Sahlbach, Rolf Ernst. 8. The MORPHEUS Data Communication and Storage Infrastructure; Fabio Campi, Antonio Deledda, Davide Rossi, Marcello Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Tommaso Demarco, Florian Ries, Matthias Kühnle, Michael Hübner, Jürgen Becker. Part III The Integrated Tool Chain. 9. Overall MORPHEUS Toolset Flow; Philippe Millet. 10. The Molen Organisation and Programming Paradigm; Koen Bertels, Marcel Beemster, Vlad-Mihai Sima, Elena Moscu Panainte, Marius Schoorel. 11. Control of Dynamic Reconfiguration; Florian Thoma, Jürgen Becker. 12. Specification Tools for Spatial Design; Arnaud Grasset, Richard Taylor, Graham Stephen, Joachim Knaeblein, Axel Schneider. 13. Spatial Design; Loic Lagadec, Damien Picard, Bernard Pottier. Part IV The Applications. 14. Real-Time digital Film Processing; Henning Sahlbach, Wolfram Putzke-Röming, Sean Whitty, Rolf Ernst. 15. EthernetBased In-Service Reconfiguration of SoCs in Telecommunication Networks; Erik Markert, Sebastian Goller, Axel Schneider, Joachim Knäblein, Ulrich Heinkel. 16. Homeland Security - Image Processing for Intelligent Cameras; Cyrille Batariere. 17. PHY-Layer of 802.16 Mobile Wireless on a Hardware Accelerated SoC; Stylianos Perissakis, Frank Ieromnimon, Nikolaos S. Voros. Part V Concluding Section. 18. Conclusions; Philippe Bonnot, Arnaud Grasset, Philippe Millet, Fabio Campi, Davide Rossi, Alberto Rosti, Wolfram Putzke- Röming, Nikolaos S. Voros, Michael Hübner, Sophie Oriol, Hélène Gros. 19. Training; Michael Hübner, Jürgen Becker, Matthias Kühnle, Florian Thoma. 20. Dissemination of MORPHEUS Results; Alberto Rosti. 21. Exploitation from the MORPHEUS Project; Alberto Rosti. 22. Project Management; Sophie Oriol, Hélène Gros. List of acronyms. Index.
Dynamic System Reconfiguration in Heterogeneous Platforms defines the MORPHEUS platform that can join the performance density advantage of reconfigurable technologies and the easy control capabilities of general purpose processors. It consists of a System-on-Chip made of a scalable system infrastructure hosting heterogeneous reconfigurable accelerators, providing dynamic reconfiguration capabilities and data-stream management capabilities.
Moreover a toolset which offers a software-oriented approach for implementing data intensive applications on the chip is presented. The toolset provides application design process based on high level programming languages as much as possible.
Various applications from differnt domains have been selected to drive the development of the project in assessing the MORPHEUS concept about its computing performance, utilization flexibility and productivity.
The emerging IEEE 802.16j standard for Mobile Broadband Wireless Access systems is the base for a first type of applications. The second application is in the area of telecommunication networks which requires data rates up to 40 Gbit/s per single line. A third application is about huge digital postprocessing of the films captured by digital camera or film scanners in resolutions up to 4K. The fourth application is about image processing for intelligent cameras.
This book details the MORPHEUS concept, a platform that can join the performance density advantage of reconfigurable technologies and the easy control capabilities of general purpose processors. It includes full coverage of numerous industrial applications.
to MORPHEUS.- State of the Art.- The MORPHEUS Architecture.- MORPHEUS Architecture Overview.- Flexeos Embedded FPGA Solution.- The Dream Digital Signal Processor.- XPP-III.- The Hardware Services.- The MORPHEUS Data Communication and Storage Infrastructure.- The Integrated Tool Chain.- Overall MORPHEUS Toolset Flow.- The Molen Organisation and Programming Paradigm.- Control of Dynamic Reconfiguration.- Specification Tools for Spatial Design.- Spatial Design.- The Applications.- Real-Time Digital Film Processing.- Ethernet Based In-Service Reconfiguration of SoCs in Telecommunication Networks.- Homeland Security - Image Processing for Intelligent Cameras.- PHY-Layer of 802.16 Mobile Wireless on a Hardware Accelerated SoC.- Concluding Section.- Conclusions.- Training.- Dissemination of MORPHEUS Results.- Exploitation from the MORPHEUS Project.- Project Management.
Michael Hübner, geboren 1968, arbeitete als Keramiker, Logistiker und freiberuflicher Webdesigner, bevor er das Schreiben für sich entdeckte. Sein erster Thriller war ein großer Lesererfolg und wurde in zahlreichen Foren und Blogs gelobt. Michael Hübners zweite Leidenschaft gilt der Fotografie und dem digitalen Bearbeiten von Bildern. Er lebt mit seiner Frau und drei Töchtern in der Nähe von Koblenz.
Inhaltsverzeichnis
Preface. Acknowledgments. Contributing Authors. Part I Introduction to MORPHEUS. 1. Introduction; Philippe Bonnot, Alberto Rosti, Fabio Campi, Wolfram Putzke- Röming, Nikolaos S. Voros, Michael Hübner, Hélène Gros. 2. State of the art; Alberto Rosti, Fabio Campi, Philippe Bonnot, Paul Brelet. Part II The MORPHEUS Architecture. 3. MORPHEUS architecture overview; Wolfram Putzke-Röming. 4. Flexeos Embedded FPGA Solution; Gabriele Pulini, David Hulance. 5. The Dream Digital Signal Processor; Claudio Mucci, Davide Rossi, Fabio Campi, Luca Ciccarelli, Matteo Pizzotti, Luca Perugini, Luca Vanzolini, Tommaso De Marco, Massimiliano Innocenti. 6. XPP-III; Eberhard Schüler, Markus Weinhardt. 7. The Hardware Services; Stéphane Guyetant, Stéphane Chevobbe, Sean Whitty, Henning Sahlbach, Rolf Ernst. 8. The MORPHEUS Data Communication and Storage Infrastructure; Fabio Campi, Antonio Deledda, Davide Rossi, Marcello Coppola, Lorenzo Pieralisi, Riccardo Locatelli, Giuseppe Maruccia, Tommaso Demarco, Florian Ries, Matthias Kühnle, Michael Hübner, Jürgen Becker. Part III The Integrated Tool Chain. 9. Overall MORPHEUS Toolset Flow; Philippe Millet. 10. The Molen Organisation and Programming Paradigm; Koen Bertels, Marcel Beemster, Vlad-Mihai Sima, Elena Moscu Panainte, Marius Schoorel. 11. Control of Dynamic Reconfiguration; Florian Thoma, Jürgen Becker. 12. Specification Tools for Spatial Design; Arnaud Grasset, Richard Taylor, Graham Stephen, Joachim Knaeblein, Axel Schneider. 13. Spatial Design; Loic Lagadec, Damien Picard, Bernard Pottier. Part IV The Applications. 14. Real-Time digital Film Processing; Henning Sahlbach, Wolfram Putzke-Röming, Sean Whitty, Rolf Ernst. 15. EthernetBased In-Service Reconfiguration of SoCs in Telecommunication Networks; Erik Markert, Sebastian Goller, Axel Schneider, Joachim Knäblein, Ulrich Heinkel. 16. Homeland Security - Image Processing for Intelligent Cameras; Cyrille Batariere. 17. PHY-Layer of 802.16 Mobile Wireless on a Hardware Accelerated SoC; Stylianos Perissakis, Frank Ieromnimon, Nikolaos S. Voros. Part V Concluding Section. 18. Conclusions; Philippe Bonnot, Arnaud Grasset, Philippe Millet, Fabio Campi, Davide Rossi, Alberto Rosti, Wolfram Putzke- Röming, Nikolaos S. Voros, Michael Hübner, Sophie Oriol, Hélène Gros. 19. Training; Michael Hübner, Jürgen Becker, Matthias Kühnle, Florian Thoma. 20. Dissemination of MORPHEUS Results; Alberto Rosti. 21. Exploitation from the MORPHEUS Project; Alberto Rosti. 22. Project Management; Sophie Oriol, Hélène Gros. List of acronyms. Index.
Klappentext
Dynamic System Reconfiguration in Heterogeneous Platforms defines the MORPHEUS platform that can join the performance density advantage of reconfigurable technologies and the easy control capabilities of general purpose processors. It consists of a System-on-Chip made of a scalable system infrastructure hosting heterogeneous reconfigurable accelerators, providing dynamic reconfiguration capabilities and data-stream management capabilities.
Fine/coarse-grain architectural elements connected by a network on chip
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Software-like design tool flow for dynamically reconfigurable platform
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Full set of industrial applications
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Unique development to true silicon
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