Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes
Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package
Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources
Helps readers to translate reliability methodology into real design flows
Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes
Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package
Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources
Helps readers to translate reliability methodology into real design flows
Artur Balasinski is a Technology Design Integration Manager for Cypress Semiconductor in San Jose, California.
Preface.- Classic DfM: from 2D to 3D.- DfM at 28 nm and Beyond.- New DfM Domain: Stress Effects.- Conclusions and Future Work.
This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.
· Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes;
· Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package;
· Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources;
· Helps readers to translate reliability methodology into real design flows.
This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.
Preface.- Classic DfM: from 2D to 3D.- DfM at 28 nm and Beyond.- New DfM Domain: Stress Effects.- Conclusions and Future Work.
Über den Autor
Artur Balasinski is a Technology Design Integration Manager for Cypress Semiconductor in San Jose, California.
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Inhaltsverzeichnis
Preface.- Classic DfM: from 2D to 3D.- DfM at 28 nm and Beyond.- New DfM Domain: Stress Effects.- Conclusions and Future Work.
Klappentext
This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package.
Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes
n
Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package
n
Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources
n
Helps readers to translate reliability methodology into real design flows
n
