ASIP Design Methodology.- A Short Introduction to Compilers.- Related Work.- Processor Designer.- Code Selector Description Generation.- Results for Semantics based Compiler Generation.- SIMD Optimization.- Predicated Execution.- Assembler Optimizer.- Summary.
formoredesigniterationsduetodeep-submicroneffects. Thisphenomenonisalso referredtoas crisis of complexityandcomesalongwithexponentiallygr- ing non-recurring engineering (NRE) costs (Fig. 1. 2) to design and manufacture chips. Understandably,thesecostsonlyamortizeforverylargevolumesorhigh-end products. $100. 000. 000. 000,00 $10. 000. 000. 000,00 $1. 000. 000. 000,00 $100. 000. 000,00 RTL Methodology Future Improvements $10. 000. 000,00 1990 1995 2000 2005 2010 2015 Fig. 1.
Presents a strong background and various perspectives of architecture description language (ADL)-based processor design and the retargetable compilation problem
Provides the history of ADL based processor design, making the reader knowledgeable about the past research as well as the difficulties faced over time
Offers an ADL based modelling formalism and corresponding implementation methods, which can be used for automatic compiler retargeting to quickly obtain compiler support for newly developed ASIPs
Presents retargetable optimization techniques for common ASIP features, which can be quickly adapted to varying target processor configurations help to meet the stringent performance requirements of embedded applications