Introduction.- nNanoscaled SOI Material and Device Technologies.- nStatus and Trends in SOI nanodevices; F. Balestra.- Non-planar devices for nanoscale CMOS; M.C. Lemme et al.- High-k dielectric stacks for nanoscaled SOI devices; S. Hall et al.- Nanoscaled semiconductor heterostructures for CMOS transistors formed by ion implantation and hydrogen transfer; V. Popov et al.- Fluorine - Vacancy Engineering: A viable solution for dopant diffusion suppression in SOI substrates; H.A.W. El Mubarek, P. Ashburn.- Suspended Silicon-On-Insulator nanowires for the fabrication of quadruple gate MOSFETs; V. Passi et al.-nPhysics of Novel Nanoscaled SemOI Devices.- nIntegration of silicon Single-Electron Transistors operating at room temperature; T. Hiramoto.- SiGe nanodots in electro-optical SOI devices; A.V. Dvurechenskii et al.- Nanowire quantum effects in trigate SOI MOSFETs; J.-P. Colinge.- Semiconductor nanostructures and devices; J. Knoch, H. Lüth.- MugFET CMOS process with midgap gate material; W. Xiong et al.- Doping fluctuation effects in multiple-gate SOI MOSFETs; C.A. Colinge et al.- SiGeC HBTs: impact of C on device performance; I.Z. Mitrovic et al.- nReliability and Characterization of Nanoscaled SOI Devices.-nNoise research of nanoscaled SOI devices; N. Lukyanchikova.- Electrical characterization and special properties of FINFET structures; T. Rudenko et al.- Substrate effect on the output conductance frequency response of SOI MOSFETs; V. Kilchytska et al.- Investigation of compressive strain effects induced by STI and ESL; S. Zaouia et al.- Charge trapping phenomena in single electron NVM SOI devices fabricated by a self-aligned quantum dot technology; A. Nazarov et al.- nTheory and Modeling of Nanoscaled Devices.- nVariability in nanoscale UTB SOI devices and its impact on circuits and systems; A. Asenov, K. Samsudin.- Electron transport in Silicon-On-Insulator nanodevices; F. Gamiz et al.- All quantum simulation of ultrathin SOIMOSFETs; A. Orlikovsky et al.- Resonant tunneling devices on SOI basis; B. Majkusiak.- Mobility modeling in SOI FETs for different substrate orientations and strain conditions; V. Sverdlov et al.- Three-dimensional (3-D) analytical modeling of the threshold voltage, DIBL and subthreshold swing of cylindrical GATE All Around MOSFETs; H.A. El Hamid et al. nAuthors Index.
Reviews by leading experts in SOI nanoscaled electronics
Analysis of prospects of SOI nanoelectronics beyond Moore's law
Explanation of fundamental limits for CMOS, SOICMOS and single electron technologies
Combined views on SOI nanoscaled electronics from experts in the fields of materials science, device physics, electrical characterization and computer simulation