List of Figures. List of Tables. Preface. I. Preliminaries. 1. Introduction. 1.1. A Typical Application Area:Automotive Electronics. 1.2. Distributed Hard Real-Time Embedded Systems. 1.3. Book Overview. 2. System-Level Design and Modeling. 2.1. System-Level Design. 2.2. Incremental Design Process. 2.3. Application Modeling. 3. Distributed Hard Real-Time Systems. 3.1. Time-Triggered vs. Event-Triggered. 3.2. The Hardware Platform. 3.3. Time-Driven Systems. 3.4. Event-Driven Systems. 3.5. Multi-Cluster Systems. II. Time-Driven Systems. 4. Scheduling and Bus Access Optimization for Time-Driven Systems. 4.1. Background. 4.2. Scheduling with Control and Data Dependencies. 4.3. Scheduling for Time-Driven Systems. 4.4. Bus Access Optimization. 4.5. Experimental Evaluation. 5. Incremental Mapping for Time-Driven Systems. 5.1. Background. 5.2. Incremental Mapping and Scheduling. 5.3. Quality Metrics and Objective Function. 5.4. Mapping and Scheduling Strategy. 5.5. Experimental Evaluation. III. Event-Driven Systems. 6. Schedulability Analysis and Bus Access Optimization for Event-Driven Systems. 6.1. Background. 6.2. Response Time Analysis. 6.3. Schedulability Analysis under Control and Data Dependencies. 6.4. Schedulability Analysis for Distributed Systems. 6.5. Schedulability Analysis for the Time Triggered Protocol. 6.6. Schedulability Analysis for Event-Driven Systems. 6.7. Bus Access Optimization. 6.8. Experimental Evaluation. 7. Incremental Mapping for Event-Driven Systems. 7.1. Application Mapping and Scheduling. 7.2. Mapping and Scheduling in an Incremental Design Approach. 7.3. Quality Metrics and Exact Problem Formulation. 7.4. Mapping and Scheduling Strategy. 7.5. Experimental Evaluation. IV. Multi-Cluster Systems. 8. Schedulability Analysis and Bus Access Optimization for Multi-Cluster Systems. 8.1. Problem Formulation. 8.2. Multi-Cluster Scheduling. 8.3. Scheduling and Optimization Strategy. 8.4. Experimental Evaluation. 9. Partitioning and Mapping for Multi-Cluster Systems. 9.1. Partitioning and Mapping. 9.2. Partitioning and Mapping Strategy. 9.3. Experimental Evaluation. 10. Schedulability-Driven Frame Packing for Multi-Cluster Systems. 10.1. Problem Formulation. 10.2. Frame Packing Strategy. 10.3. Experimental Evaluation. Appendix A. List of Notations. List of Abbreviations. Index. Bibliography.
Embedded computer systems are now everywhere: from alarm clocks to PDAs, from mobile phones to cars, almost all the devices we use are controlled by embedded computers. An important class of embedded computer systems is that of hard real-time systems, which have to fulfill strict timing requirements. As real-time systems become more complex, they are often implemented using distributed heterogeneous architectures.
Analysis and Synthesis of Distributed Real-Time Embedded Systems addresses the design of real-time applications implemented using distributed heterogeneous architectures. The systems are heterogeneous not only in terms of hardware components, but also in terms of communication protocols and scheduling policies. Regarding this last aspect, time-driven and event-driven systems, as well as a combination of the two, are considered. Such systems are used in many application areas like automotive electronics, real-time multimedia, avionics, medical equipment, and factory systems. The proposed analysis and synthesis techniques derive optimized implementations that fulfill the imposed design constraints. An important part of the implementation process is the synthesis of the communication infrastructure, which has a significant impact on the overall system performance and cost.
Analysis and Synthesis of Distributed Real-Time Embedded Systems considers the mapping and scheduling tasks within an incremental design process. To reduce the time-to-market of products, the design of real-time systems seldom starts from scratch. Typically, designers start from an already existing system, running certain applications, and the design problem is to implement new functionality on top of this system. Supporting such an incremental design process provides a high degree of flexibility, and can result in important reductions of design costs.
Considers the mapping and scheduling tasks within an incremental design process