The two-volume set LNCS 9206 and LNCS 9207 constitutes the refereed proceedings of the 27th International Conference on Computer Aided Verification, CAV 2015, held in San Francisco, CA, USA, in July 2015.
The total of 58 full and 11 short papers presented in the proceedings was carefully reviewed and selected from 252 submissions. The papers were organized in topical sections named: model checking and refinements; quantitative reasoning; software analysis; lightning talks; interpolation, IC3/PDR, and Invariants; SMT techniques and applications; HW verification; synthesis; termination; and concurrency.
SMT Techniques and Applications.- POLING: SMT Aided Linearizability Proofs.- Finding Bounded Path in Graph Using SMT for Automatic Clock Routing.- Cutting the Mix.- The Inez Mathematical Programming Modulo Theories Framework.- Using Minimal Correction Sets to More Efficiently Compute Minimal Unsatisfiable Sets.- Deciding Local Theory Extensions via E-matching.- HW Verification.- Modular Deductive Verification of Multiprocessor Hardware Designs.- Word-Level Symbolic Trajectory Evaluation.- Verifying Linearizability of Intel® Software Guard Extensions.- Synthesis Synthesis Through Unification.- From Non-preemptive to Preemptive Scheduling Using Synchronization Synthesis.- Counterexample-Guided Quantifier Instantiation for Synthesis in SMT.- Deductive Program Repair.- Quantifying Conformance Using the Skorokhod Metric.- Pareto Curves of Multidimensional Mean-Payoff Games.- Termination.- Conflict-Driven Conditional Termination.- Predicate Abstraction and CEGAR for Disproving Termination of Higher-Order Functional Programs.- Complexity of Bradley-Manna-Sipma Lexicographic Ranking Functions.- Measuring with Timed Patterns.- Automatic Verification of Stability and Safety for Delay Differential Equations.- Time Robustness in MTL and Expressivity in Hybrid System Falsification.- Concurrency.- Adaptive Concretization for Parallel Program Synthesis.- Automatic Completion of Distributed Protocols with Symmetry.- An Axiomatic Specification for Sequential Memory Models.- Approximate Synchrony: An Abstraction for Distributed Almost-Synchronous Systems.- Automated and Modular Refinement Reasoning for Concurrent Programs.
The two-volume set LNCS 9206 and LNCS 9207 constitutes the refereed proceedings of the 27th International Conference on Computer Aided Verification, CAV 2015, held in San Francisco, CA, USA, in July 2015. The total of 58 full and 11 short papers presented in the proceedings was carefully reviewed and selected from 252 submissions.
SMT Techniques and Applications.- POLING: SMT Aided Linearizability Proofs.- Finding Bounded Path in Graph Using SMT for Automatic Clock Routing.- Cutting the Mix.- The Inez Mathematical Programming Modulo Theories Framework.- Using Minimal Correction Sets to More Efficiently Compute Minimal Unsatisfiable Sets.- Deciding Local Theory Extensions via E-matching.- HW Verification.- Modular Deductive Verification of Multiprocessor Hardware Designs.- Word-Level Symbolic Trajectory Evaluation.- Verifying Linearizability of Intel® Software Guard Extensions.- Synthesis Synthesis Through Unification.- From Non-preemptive to Preemptive Scheduling Using Synchronization Synthesis.- Counterexample-Guided Quantifier Instantiation for Synthesis in SMT.- Deductive Program Repair.- Quantifying Conformance Using the Skorokhod Metric.- Pareto Curves of Multidimensional Mean-Payoff Games.- Termination.- Conflict-Driven Conditional Termination.- Predicate Abstraction and CEGAR for Disproving Termination ofHigher-Order Functional Programs.- Complexity of Bradley-Manna-Sipma Lexicographic Ranking Functions.- Measuring with Timed Patterns.- Automatic Verification of Stability and Safety for Delay Differential Equations.- Time Robustness in MTL and Expressivity in Hybrid System Falsification.- Concurrency.- Adaptive Concretization for Parallel Program Synthesis.- Automatic Completion of Distributed Protocols with Symmetry.- An Axiomatic Specification for Sequential Memory Models.- Approximate Synchrony: An Abstraction for Distributed Almost-Synchronous Systems.- Automated and Modular Refinement Reasoning for Concurrent Programs.
Inhaltsverzeichnis
SMT Techniques and Applications.- POLING: SMT Aided Linearizability Proofs.- Finding Bounded Path in Graph Using SMT for Automatic Clock Routing.- Cutting the Mix.- The Inez Mathematical Programming Modulo Theories Framework.- Using Minimal Correction Sets to More Efficiently Compute Minimal Unsatisfiable Sets.- Deciding Local Theory Extensions via E-matching.- HW Verification.- Modular Deductive Verification of Multiprocessor Hardware Designs.- Word-Level Symbolic Trajectory Evaluation.- Verifying Linearizability of Intel® Software Guard Extensions.- Synthesis Synthesis Through Unification.- From Non-preemptive to Preemptive Scheduling Using Synchronization Synthesis.- Counterexample-Guided Quantifier Instantiation for Synthesis in SMT.- Deductive Program Repair.- Quantifying Conformance Using the Skorokhod Metric.- Pareto Curves of Multidimensional Mean-Payoff Games.- Termination.- Conflict-Driven Conditional Termination.- Predicate Abstraction and CEGAR for Disproving Termination of Higher-Order Functional Programs.- Complexity of Bradley-Manna-Sipma Lexicographic Ranking Functions.- Measuring with Timed Patterns.- Automatic Verification of Stability and Safety for Delay Differential Equations.- Time Robustness in MTL and Expressivity in Hybrid System Falsification.- Concurrency.- Adaptive Concretization for Parallel Program Synthesis.- Automatic Completion of Distributed Protocols with Symmetry.- An Axiomatic Specification for Sequential Memory Models.- Approximate Synchrony: An Abstraction for Distributed Almost-Synchronous Systems.- Automated and Modular Refinement Reasoning for Concurrent Programs.
Klappentext
The two-volume set LNCS 9206 and LNCS 9207 constitutes the refereed proceedings of the 27th International Conference on Computer Aided Verification, CAV 2015, held in San Francisco, CA, USA, in July 2015.
The total of 58 full and 11 short papers presented in the proceedings was carefully reviewed and selected from 252 submissions. The papers were organized in topical sections named: model checking and refinements; quantitative reasoning; software analysis; lightning talks; interpolation, IC3/PDR, and Invariants; SMT techniques and applications; HW verification; synthesis; termination; and concurrency.
Includes supplementary material: sn.pub/extras
