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  • weitere Filter
    Autor
    nihal kularatna
    (2)
    lata, kusum (department of electronics and communication engineering, the lnm institute of information technology, jaipur, india.)
    (1)
    sinha, g.r. (department of electronics and communication engineering, myanmar institute of information technology, mandalay
    (1)
    wen-long chin
    (1)
    Schlagwort
    gate level netlist
    (6)
    analog signal processing
    (3)
    iot device
    (3)
    power consumption
    (3)
    5g network
    (2)
    authentication protocols
    (2)
    big data
    (2)
    blockchain integration
    (2)
    cfa
    (2)
    cloud computing
    (2)
    computernetzwerke und maschinelle kommunikation
    (2)
    configurable logic blocks
    (2)
    core tile
    (2)
    data conversion techniques
    (2)
    data handling
    (2)
    data handling and management
    (2)
    dc dc converter
    (2)
    distributed computing
    (2)
    equivalent circuit
    (2)
    error amplifier
    (2)
    fir filter
    (2)
    fpga device
    (2)
    fully automated smart envir
    (2)
    hardware vulnerability
    (2)
    iot node
    (2)
    ipv6 address
    (2)
    mixed signal design
    (2)
    mobile distributed systems
    (2)
    networking
    (2)
    peripheral devices
    (2)
    phase frequency detector
    (2)
    power management circuits
    (2)
    pwm converter
    (2)
    rtl de
    (2)
    sar adc
    (2)
    schaltkreise und komponenten (bauteile)
    (2)
    sdn
    (2)
    sdn controller
    (2)
    secure iot network architecture
    (2)
    security and privacy
    (2)
    signal integrity analysis
    (2)
    smart city
    (2)
    system on chip engineering
    (2)
    trust
    (2)
    urban planning technology
    (2)
    vanet
    (2)
    vco
    (2)
    vhdl code
    (2)
    vhdl description
    (2)
    wireless sensor networks
    (2)
    advanced digital system architecture
    (1)
    asic implementation
    (1)
    clock domain
    (1)
    combinational circuit
    (1)
    continuous assignment
    (1)
    deep learning
    (1)
    device modeling techniques
    (1)
    digital logic synthesis
    (1)
    eda tool
    (1)
    electronic system modeling
    (1)
    fixed point binary number
    (1)
    fixed point number
    (1)
    fpga implementation
    (1)
    full adder
    (1)
    gan hemt
    (1)
    hardware accelerators
    (1)
    hardware description language
    (1)
    hardware implementation
    (1)
    hardware verification methods
    (1)
    hold time constrai
    (1)
    ht
    (1)
    identification number
    (1)
    integrated circuit design
    (1)
    machine learning
    (1)
    ml algorithm
    (1)
    ml model
    (1)
    physical design automation
    (1)
    posedge clk
    (1)
    rechnerarchitektur und logik-entwurf
    (1)
    reconfigurable computing systems
    (1)
    register transfer methodology
    (1)
    reservoir computing
    (1)
    s box
    (1)
    sdf file
    (1)
    sequential circuits
    (1)
    side channel analysis
    (1)
    supervised machine learning
    (1)
    supervised machine learning a
    (1)
    timing diagram
    (1)
    unsupervised ml
    (1)
    verilog codes
    (1)
    verilog hdl
    (1)
    vlsi circuit analysis
    (1)
    vlsi design
    (1)
    Erscheinungsjahr
    2008
    (1)
    2019
    (1)
    2020
    (1)
    2021
    (1)
    2022
    (2)

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