Clés pour l'optimisation des architectures CMOS efficaces

Claves para optimizar arquitecturas CMOS eficientes

Keys for Optimizing Efficient CMOS Architectures

Analysis of various DCVSL Structures and Implementation of Full Adder

Performance Evaluation of Arithmetic Circuits Using GDI Full Adder

Foundation of Digital Electronics and Logic Design

GDI: Power & Area Efficient Digital Circuits for Portable Devices

Comparison of Adiabatic and CMOS adders

New Approach to Low Power Full Adder Cell

Low Power Adiabatic Logic Design

Design and Analysis of High Performance Full Adder Cell

Full Adder utilizzando CNFET per applicazioni mission-critical

Quantum-Dot Cellular Automata Circuits for Nanocomputing Applications

Full Adder using CNFET for Mission Critical Applications

CNFET based Full Adders for Mission Critical Applications

Principles of Verilog Digital Design

Feynman Lectures On Computation

VLSI Design

Algorithms and Data Structures in C++

Verilog HDL Design Examples

Digital Logic Techniques

From Computing to Computational Thinking

From Computing to Computational Thinking

Klucz do optymalizacji wydajnych architektur CMOS

Chaves para a otimização de arquitecturas CMOS eficientes

Schlüssel zur Optimierung von effizienten CMOS-Architekturen

Chiavi per l'ottimizzazione di architetture CMOS efficienti

FPGA-Based Embedded System Developer's Guide

Introduction to VLSI Systems

Verilog HDL

Digital Design

Quantum-Dot Cellular Automata Circuits for Nanocomputing Applications

Nanoelectronics for Next-Generation Integrated Circuits

Applications of Field-Programmable Gate Arrays in Scientific Research

Digital Logic Techniques

Applications of Field-Programmable Gate Arrays in Scientific Research

Verilog HDL Design Examples

Basic VLSI Design Technology